L14-Click 1.0
STM32WLE5CC LoRaWAN Sensor Platform
Loading...
Searching...
No Matches
startup_stm32wle5ccux.s
Go to the documentation of this file.
1/**
2 ******************************************************************************
3 * @file startup_stm32wle5xx.s
4 * @author MCD Application Team
5 * @brief STM32WLE5xx devices vector table for GCC toolchain.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address,
10 * - Branches to main in the C library (which eventually
11 * calls main()).
12 * After Reset the Cortex-M4 processor is in Thread mode,
13 * priority is Privileged, and the Stack is set to Main.
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2020-2021 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 */
26
27.syntax unified
28.cpu cortex-m4
29.fpu softvfp
30.thumb
31
32.global g_pfnVectors
33.global Default_Handler
34
35/* start address for the initialization values of the .data section.
36defined in linker script */
37.word _sidata
38/* start address for the .data section. defined in linker script */
39.word _sdata
40/* end address for the .data section. defined in linker script */
41.word _edata
42/* start address for the .bss section. defined in linker script */
43.word _sbss
44/* end address for the .bss section. defined in linker script */
45.word _ebss
46
47/**
48 * @brief This is the code that gets called when the processor first
49 * starts execution following a reset event. Only the absolutely
50 * necessary set is performed, after which the application
51 * supplied main() routine is called.
52 * @param None
53 * @retval : None
54*/
55
56 .section .text.Reset_Handler
57 .weak Reset_Handler
58 .type Reset_Handler, %function
59Reset_Handler:
60 ldr r0, =_estack
61 mov sp, r0 /* set stack pointer */
62
63/* Call the clock system initialization function.*/
64 bl SystemInit
65
66/* Copy the data segment initializers from flash to SRAM */
67 ldr r0, =_sdata
68 ldr r1, =_edata
69 ldr r2, =_sidata
70 movs r3, #0
71 b LoopCopyDataInit
72
73CopyDataInit:
74 ldr r4, [r2, r3]
75 str r4, [r0, r3]
76 adds r3, r3, #4
77
78LoopCopyDataInit:
79 adds r4, r0, r3
80 cmp r4, r1
81 bcc CopyDataInit
82
83/* Zero fill the bss segment. */
84 ldr r2, =_sbss
85 ldr r4, =_ebss
86 movs r3, #0
87 b LoopFillZerobss
88
89FillZerobss:
90 str r3, [r2]
91 adds r2, r2, #4
92
93LoopFillZerobss:
94 cmp r2, r4
95 bcc FillZerobss
96
97/* Call static constructors */
98 bl __libc_init_array
99/* Call the application's entry point.*/
100 bl main
101
102LoopForever:
103 b LoopForever
104
105 .size Reset_Handler, .-Reset_Handler
106
107/**
108 * @brief This is the code that gets called when the processor receives an
109 * unexpected interrupt. This simply enters an infinite loop, preserving
110 * the system state for examination by a debugger.
111 *
112 * @param None
113 * @retval : None
114*/
115 .section .text.Default_Handler,"ax",%progbits
116Default_Handler:
117Infinite_Loop:
118 b Infinite_Loop
119 .size Default_Handler, .-Default_Handler
120
121/******************************************************************************
122*
123* The STM32WLE5xx vector table. Note that the proper constructs
124* must be placed on this to ensure that it ends up at physical address
125* 0x0000.0000.
126*
127******************************************************************************/
128 .section .isr_vector,"a",%progbits
129 .type g_pfnVectors, %object
130
131g_pfnVectors:
132 .word _estack
133 .word Reset_Handler
134 .word NMI_Handler
135 .word HardFault_Handler
136 .word MemManage_Handler
137 .word BusFault_Handler
138 .word UsageFault_Handler
139 .word 0
140 .word 0
141 .word 0
142 .word 0
143 .word SVC_Handler
144 .word DebugMon_Handler
145 .word 0
146 .word PendSV_Handler
147 .word SysTick_Handler
148 .word WWDG_IRQHandler /* Window Watchdog interrupt */
149 .word PVD_PVM_IRQHandler /* PVD and PVM interrupt through EXTI */
150 .word TAMP_STAMP_LSECSS_SSRU_IRQHandler /* RTC Tamper, RTC TimeStamp, LSECSS and RTC SSRU int.*/
151 .word RTC_WKUP_IRQHandler /* RTC wakeup interrupt through EXTI[19] */
152 .word FLASH_IRQHandler /* Flash memory global interrupt and Flash memory ECC */
153 .word RCC_IRQHandler /* RCC global interrupt */
154 .word EXTI0_IRQHandler /* EXTI line 0 interrupt */
155 .word EXTI1_IRQHandler /* EXTI line 1 interrupt */
156 .word EXTI2_IRQHandler /* EXTI line 2 interrupt */
157 .word EXTI3_IRQHandler /* EXTI line 3 interrupt */
158 .word EXTI4_IRQHandler /* EXTI line 4 interrupt */
159 .word DMA1_Channel1_IRQHandler /* DMA1 channel 1 interrupt */
160 .word DMA1_Channel2_IRQHandler /* DMA1 channel 2 interrupt */
161 .word DMA1_Channel3_IRQHandler /* DMA1 channel 3 interrupt */
162 .word DMA1_Channel4_IRQHandler /* DMA1 channel 4 interrupt */
163 .word DMA1_Channel5_IRQHandler /* DMA1 channel 5 interrupt */
164 .word DMA1_Channel6_IRQHandler /* DMA1 channel 6 interrupt */
165 .word DMA1_Channel7_IRQHandler /* DMA1 channel 7 interrupt */
166 .word ADC_IRQHandler /* ADC interrupt */
167 .word DAC_IRQHandler /* DAC interrupt */
168 .word 0 /* Reserved */
169 .word COMP_IRQHandler /* COMP1 and COMP2 interrupt through EXTI */
170 .word EXTI9_5_IRQHandler /* EXTI line 9_5 interrupt */
171 .word TIM1_BRK_IRQHandler /* Timer 1 break interrupt */
172 .word TIM1_UP_IRQHandler /* Timer 1 Update */
173 .word TIM1_TRG_COM_IRQHandler /* Timer 1 trigger and communication */
174 .word TIM1_CC_IRQHandler /* Timer 1 capture compare interrupt */
175 .word TIM2_IRQHandler /* TIM2 global interrupt */
176 .word TIM16_IRQHandler /* Timer 16 global interrupt */
177 .word TIM17_IRQHandler /* Timer 17 global interrupt */
178 .word I2C1_EV_IRQHandler /* I2C1 event interrupt */
179 .word I2C1_ER_IRQHandler /* I2C1 event interrupt */
180 .word I2C2_EV_IRQHandler /* I2C2 error interrupt */
181 .word I2C2_ER_IRQHandler /* I2C2 error interrupt */
182 .word SPI1_IRQHandler /* SPI1 global interrupt */
183 .word SPI2_IRQHandler /* SPI2 global interrupt */
184 .word USART1_IRQHandler /* USART1 global interrupt */
185 .word USART2_IRQHandler /* USART2 global interrupt */
186 .word LPUART1_IRQHandler /* LPUART1 global interrupt */
187 .word LPTIM1_IRQHandler /* LPtimer 1 global interrupt */
188 .word LPTIM2_IRQHandler /* LPtimer 2 global interrupt */
189 .word EXTI15_10_IRQHandler /* EXTI line 15_10] interrupt through EXTI */
190 .word RTC_Alarm_IRQHandler /* RTC Alarms A & B interrupt */
191 .word LPTIM3_IRQHandler /* LPtimer 3 global interrupt */
192 .word SUBGHZSPI_IRQHandler /* SUBGHZSPI global interrupt */
193 .word 0 /* Reserved */
194 .word 0 /* Reserved */
195 .word HSEM_IRQHandler /* Semaphore interrupt 0 to CPU1 */
196 .word I2C3_EV_IRQHandler /* I2C3 event interrupt */
197 .word I2C3_ER_IRQHandler /* I2C3 error interrupt */
198 .word SUBGHZ_Radio_IRQHandler /* Radio IRQs RFBUSY interrupt through EXTI */
199 .word AES_IRQHandler /* AES global interrupt */
200 .word RNG_IRQHandler /* RNG interrupt */
201 .word PKA_IRQHandler /* PKA interrupt */
202 .word DMA2_Channel1_IRQHandler /* DMA2 channel 1 interrupt */
203 .word DMA2_Channel2_IRQHandler /* DMA2 channel 2 interrupt */
204 .word DMA2_Channel3_IRQHandler /* DMA2 channel 3 interrupt */
205 .word DMA2_Channel4_IRQHandler /* DMA2 channel 4 interrupt */
206 .word DMA2_Channel5_IRQHandler /* DMA2 channel 5 interrupt */
207 .word DMA2_Channel6_IRQHandler /* DMA2 channel 6 interrupt */
208 .word DMA2_Channel7_IRQHandler /* DMA2 channel 7 interrupt */
209 .word DMAMUX1_OVR_IRQHandler /* DMAMUX overrun interrupt */
210
211 .size g_pfnVectors, .-g_pfnVectors
212
213/*******************************************************************************
214*
215* Provide weak aliases for each Exception handler to the Default_Handler.
216* As they are weak aliases, any function with the same name will override
217* this definition.
218*
219*******************************************************************************/
220
221 .weak NMI_Handler
222 .thumb_set NMI_Handler,Default_Handler
223
224 .weak HardFault_Handler
225 .thumb_set HardFault_Handler,Default_Handler
226
227 .weak MemManage_Handler
228 .thumb_set MemManage_Handler,Default_Handler
229
230 .weak BusFault_Handler
231 .thumb_set BusFault_Handler,Default_Handler
232
233 .weak UsageFault_Handler
234 .thumb_set UsageFault_Handler,Default_Handler
235
236 .weak SVC_Handler
237 .thumb_set SVC_Handler,Default_Handler
238
239 .weak DebugMon_Handler
240 .thumb_set DebugMon_Handler,Default_Handler
241
242 .weak PendSV_Handler
243 .thumb_set PendSV_Handler,Default_Handler
244
245 .weak SysTick_Handler
246 .thumb_set SysTick_Handler,Default_Handler
247
248 .weak WWDG_IRQHandler
249 .thumb_set WWDG_IRQHandler,Default_Handler
250
251 .weak PVD_PVM_IRQHandler
252 .thumb_set PVD_PVM_IRQHandler,Default_Handler
253
254 .weak TAMP_STAMP_LSECSS_SSRU_IRQHandler
255 .thumb_set TAMP_STAMP_LSECSS_SSRU_IRQHandler,Default_Handler
256
257 .weak RTC_WKUP_IRQHandler
258 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
259
260 .weak FLASH_IRQHandler
261 .thumb_set FLASH_IRQHandler,Default_Handler
262
263 .weak RCC_IRQHandler
264 .thumb_set RCC_IRQHandler,Default_Handler
265
266 .weak EXTI0_IRQHandler
267 .thumb_set EXTI0_IRQHandler,Default_Handler
268
269 .weak EXTI1_IRQHandler
270 .thumb_set EXTI1_IRQHandler,Default_Handler
271
272 .weak EXTI2_IRQHandler
273 .thumb_set EXTI2_IRQHandler,Default_Handler
274
275 .weak EXTI3_IRQHandler
276 .thumb_set EXTI3_IRQHandler,Default_Handler
277
278 .weak EXTI4_IRQHandler
279 .thumb_set EXTI4_IRQHandler,Default_Handler
280
281 .weak DMA1_Channel1_IRQHandler
282 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
283
284 .weak DMA1_Channel2_IRQHandler
285 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
286
287 .weak DMA1_Channel3_IRQHandler
288 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
289
290 .weak DMA1_Channel4_IRQHandler
291 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
292
293 .weak DMA1_Channel5_IRQHandler
294 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
295
296 .weak DMA1_Channel6_IRQHandler
297 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
298
299 .weak DMA1_Channel7_IRQHandler
300 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
301
302 .weak ADC_IRQHandler
303 .thumb_set ADC_IRQHandler,Default_Handler
304
305 .weak DAC_IRQHandler
306 .thumb_set DAC_IRQHandler,Default_Handler
307
308 .weak COMP_IRQHandler
309 .thumb_set COMP_IRQHandler,Default_Handler
310
311 .weak EXTI9_5_IRQHandler
312 .thumb_set EXTI9_5_IRQHandler,Default_Handler
313
314 .weak TIM1_BRK_IRQHandler
315 .thumb_set TIM1_BRK_IRQHandler,Default_Handler
316
317 .weak TIM1_UP_IRQHandler
318 .thumb_set TIM1_UP_IRQHandler,Default_Handler
319
320 .weak TIM1_TRG_COM_IRQHandler
321 .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
322
323 .weak TIM1_CC_IRQHandler
324 .thumb_set TIM1_CC_IRQHandler,Default_Handler
325
326 .weak TIM2_IRQHandler
327 .thumb_set TIM2_IRQHandler,Default_Handler
328
329 .weak TIM16_IRQHandler
330 .thumb_set TIM16_IRQHandler,Default_Handler
331
332 .weak TIM17_IRQHandler
333 .thumb_set TIM17_IRQHandler,Default_Handler
334
335 .weak I2C1_EV_IRQHandler
336 .thumb_set I2C1_EV_IRQHandler,Default_Handler
337
338 .weak I2C1_ER_IRQHandler
339 .thumb_set I2C1_ER_IRQHandler,Default_Handler
340
341 .weak I2C2_EV_IRQHandler
342 .thumb_set I2C2_EV_IRQHandler,Default_Handler
343
344 .weak I2C2_ER_IRQHandler
345 .thumb_set I2C2_ER_IRQHandler,Default_Handler
346
347 .weak SPI1_IRQHandler
348 .thumb_set SPI1_IRQHandler,Default_Handler
349
350 .weak SPI2_IRQHandler
351 .thumb_set SPI2_IRQHandler,Default_Handler
352
353 .weak USART1_IRQHandler
354 .thumb_set USART1_IRQHandler,Default_Handler
355
356 .weak USART2_IRQHandler
357 .thumb_set USART2_IRQHandler,Default_Handler
358
359 .weak LPUART1_IRQHandler
360 .thumb_set LPUART1_IRQHandler,Default_Handler
361
362 .weak LPTIM1_IRQHandler
363 .thumb_set LPTIM1_IRQHandler,Default_Handler
364
365 .weak LPTIM2_IRQHandler
366 .thumb_set LPTIM2_IRQHandler,Default_Handler
367
368 .weak EXTI15_10_IRQHandler
369 .thumb_set EXTI15_10_IRQHandler,Default_Handler
370
371 .weak RTC_Alarm_IRQHandler
372 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
373
374 .weak LPTIM3_IRQHandler
375 .thumb_set LPTIM3_IRQHandler,Default_Handler
376
377 .weak SUBGHZSPI_IRQHandler
378 .thumb_set SUBGHZSPI_IRQHandler,Default_Handler
379
380 .weak HSEM_IRQHandler
381 .thumb_set HSEM_IRQHandler,Default_Handler
382
383 .weak I2C3_EV_IRQHandler
384 .thumb_set I2C3_EV_IRQHandler,Default_Handler
385
386 .weak I2C3_ER_IRQHandler
387 .thumb_set I2C3_ER_IRQHandler,Default_Handler
388
389 .weak SUBGHZ_Radio_IRQHandler
390 .thumb_set SUBGHZ_Radio_IRQHandler,Default_Handler
391
392 .weak AES_IRQHandler
393 .thumb_set AES_IRQHandler,Default_Handler
394
395 .weak RNG_IRQHandler
396 .thumb_set RNG_IRQHandler,Default_Handler
397
398 .weak PKA_IRQHandler
399 .thumb_set PKA_IRQHandler,Default_Handler
400
401 .weak DMA2_Channel1_IRQHandler
402 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
403
404 .weak DMA2_Channel2_IRQHandler
405 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
406
407 .weak DMA2_Channel3_IRQHandler
408 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
409
410 .weak DMA2_Channel4_IRQHandler
411 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
412
413 .weak DMA2_Channel5_IRQHandler
414 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
415
416 .weak DMA2_Channel6_IRQHandler
417 .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
418
419 .weak DMA2_Channel7_IRQHandler
420 .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
421
422 .weak DMAMUX1_OVR_IRQHandler
423 .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
424
425 .weak SystemInit